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* ARC: axs10x: really enable ARC PGUAlexey Brodkin2016-11-30
| | | | | | | | | | | | | | | | | | | | | | | Up until now we had ARC PGU not enabled in axs10x defconfigs trying to not bloat kernel image again with yet another drivers and subsystems. This change configures ARC PGU (as well as DRM bits it depends on) to be built as a module and so those who need LCD screen to work on axs10x may bundle built .ko files in their target's file-system with help of the following command on host: ------------->8------------- make INSTALL_MOD_PATH=_path_to_target_fs_ modules_install ------------->8------------- and later on target with commands as simple as: ------------->8------------- modprobe adv7511.ko modprobe arcpgu.ko ------------->8------------- get LCD working. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: rename Zebu platform support to HAPSVineet Gupta2016-11-30
| | | | | | | | | | There are more ARC Linux HAPS users than Zebu ones. Same kernel would work fine on both, even with embedded DT, assuming the FPGA bitfile configuration is same Suggested-by: Francois Bedard <fbedard@ynopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: Enable PERF_EVENTS in nSIM driven platformsAlexey Brodkin2016-10-31
| | | | | | | | | | | | | | | | | | | Now when we have properly working performance counters in nSIM even with interrupt support (fix should be a part of upcoming nSIM engineering build 2016.12-005) we may enable perf support by default for all platforms that use nSIM for ARC cores simulation. Note 1: PCT node was missing for some reason in nsimosci.dts while all other nSIM-related .dts files already had PCT node for quite some time, so adding it now. Note 2: All defconfigs were regenerated with "make savedefconfig" which led to some clean-ups in nsimosci_hs_smp_defconfig: CONFIG_FRAMEBUFFER_CONSOLE=y was removed because it is automatically selected now by DRM. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [build] Support gz, lzma compressed uImageDaniel Mentz2016-10-16
| | | | | | | | | | | | Add support for lzma compressed uImage. Support for gzip was already available but could not be enabled because we were missing CONFIG_HAVE_KERNEL_GZIP in arch/arc/Kconfig. Signed-off-by: Daniel Mentz <danielmentz@google.com> Cc: linux-snps-arc@lists.infradead.org Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: Add support for ZeBu Emulation platform for HS coresVineet Gupta2016-09-30
| | | | | | | | The cool thing is that same kernel image can run on - nsim OSCI simulation platform - SDPlite FPGA setups Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* arc: Add "model" properly in device tree description of all boardsAlexey Brodkin2016-09-30
| | | | | | | | | | | | | | | As it was discussed quite some time ago (see https://lkml.org/lkml/2015/11/5/862) it's a good practice to add "model" property in .dts. Moreover as per ePAPR "model" property is required and should look like "manufacturer,model" so we do here. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Jonas Gorski <jonas.gorski@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh@kernel.org> Cc: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* Back-merge tag 'v4.7-rc5' into drm-nextDave Airlie2016-07-02
|\ | | | | | | | | | | Linux 4.7-rc5 The fsl-dcu pull needs -rc3 so go to -rc5 for now.
| * arc: Get rid of root core-frequency propertyAlexey Brodkin2016-05-30
| | | | | | | | | | | | | | | | | | | | | | | | Now when we switched to usage of real clk devices for CPU core frequency those root properties make no sense any longer. Se we're just getting rid of them here to not confuse readers of our .dts files. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Christian Ruppert <christian.ruppert@alitech.com> Cc: Noam Camus <noamca@mellanox.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: [nsimosci] Enable ARC PGU on nSIM OSCI virtual platformsAlexey Brodkin2016-06-13
| | | | | | | | | | | | | | | | With required ARC PGU updates that allow it to be used on simulation platforms we may finally utilize ARC PGU in nSIM OSCI virtual platforms with modern Linux kernels. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | ARCv2: [vdk] Enable ARC PGU on HS38 VDKAlexey Brodkin2016-06-13
|/ | | | | | | | With required ARC PGU updates that allow it to be used on simulation platforms we may finally utilize ARC PGU in HS38 VDK with modern Linux kernels. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2016-05-23
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm updates from Dave Airlie: "Here's the main drm pull request for 4.7, it's been a busy one, and I've been a bit more distracted in real life this merge window. Lots more ARM drivers, not sure if it'll ever end. I think I've at least one more coming the next merge window. But changes are all over the place, support for AMD Polaris GPUs is in here, some missing GM108 support for nouveau (found in some Lenovos), a bunch of MST and skylake fixes. I've also noticed a few fixes from Arnd in my inbox, that I'll try and get in asap, but I didn't think they should hold this up. New drivers: - Hisilicon kirin display driver - Mediatek MT8173 display driver - ARC PGU - bitstreamer on Synopsys ARC SDP boards - Allwinner A13 initial RGB output driver - Analogix driver for DisplayPort IP found in exynos and rockchip DRM Core: - UAPI headers fixes and C++ safety - DRM connector reference counting - DisplayID mode parsing for Dell 5K monitors - Removal of struct_mutex from drivers - Connector registration cleanups - MST robustness fixes - MAINTAINERS updates - Lockless GEM object freeing - Generic fbdev deferred IO support panel: - Support for a bunch of new panels i915: - VBT refactoring - PLL computation cleanups - DSI support for BXT - Color manager support - More atomic patches - GEM improvements - GuC fw loading fixes - DP detection fixes - SKL GPU hang fixes - Lots of BXT fixes radeon/amdgpu: - Initial Polaris support - GPUVM/Scheduler/Clock/Power improvements - ASYNC pageflip support - New mesa feature support nouveau: - GM108 support - Power sensor support improvements - GR init + ucode fixes. - Use GPU provided topology information vmwgfx: - Add host messaging support gma500: - Some cleanups and fixes atmel: - Bridge support - Async atomic commit support fsl-dcu: - Timing controller for LCD support - Pixel clock polarity support rcar-du: - Misc fixes exynos: - Pipeline clock support - Exynoss4533 SoC support - HW trigger mode support - export HDMI_PHY clock - DECON5433 fixes - Use generic prime functions - use DMA mapping APIs rockchip: - Lots of little fixes vc4: - Render node support - Gamma ramp support - DPI output support msm: - Mostly cleanups and fixes - Conversion to generic struct fence etnaviv: - Fix for prime buffer handling - Allow hangcheck to be coalesced with other wakeups tegra: - Gamme table size fix" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1050 commits) drm/edid: add displayid detailed 1 timings to the modelist. (v1.1) drm/edid: move displayid validation to it's own function. drm/displayid: Iterate over all DisplayID blocks drm/edid: move displayid tiled block parsing into separate function. drm: Nuke ->vblank_disable_allowed drm/vmwgfx: Report vmwgfx version to vmware.log drm/vmwgfx: Add VMWare host messaging capability drm/vmwgfx: Kill some lockdep warnings drm/nouveau/gr/gf100-: fix race condition in fecs/gpccs ucode drm/nouveau/core: recognise GM108 chipsets drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setup drm/nouveau/gr/gk104-: share implementation of ppc exception init drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctx drm/nouveau/bios/pll: check BIT table version before trying to parse it drm/nouveau/bios/pll: prevent oops when limits table can't be parsed drm/nouveau/volt/gk104: round up in gk104_volt_set drm/nouveau/fb/gm200: setup mmu debug buffer registers at init() drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init() drm/nouveau/fb/gf100-: allocate mmu debug buffers drm/nouveau/fb: allow chipset-specific actions for oneinit() ...
| * Merge branch 'topic-arcpgu-updates' of ↵Dave Airlie2016-05-17
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/foss-for-synopsys-dwc-arc-processors/linux into drm-next Please pull this mini-series that allows ARC PGU to use dedicated memory location as framebuffer backing storage. * 'topic-arcpgu-updates' of https://github.com/foss-for-synopsys-dwc-arc-processors/linux: ARC: [axs10x] Specify reserved memory for frame buffer drm/arcpgu: use dedicated memory area for frame buffer
| | * ARC: [axs10x] Specify reserved memory for frame bufferAlexey Brodkin2016-04-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allocation of a frame buffer memory in a special memory region allows bypassing of so-called IO Coherency aperture which is typically set as a range 0x8z-0xAz. I.e. all data traffic to PGU bypasses IO Coherency block and saves its bandwidth for other peripherals. Even though for AXS101 (which sorts ARC770 CPU) IOC is not an option for a sake of keeping one DT description for the base-board (axs10x_mb.dtsi) we're still defining reserved memory location in the very end of DDR. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Cc: devicetree@vger.kernel.org
| * | Merge tag 'v4.6-rc7' into drm-nextDave Airlie2016-05-09
| |\ \ | | |/ | |/| | | | | | | Merge this back as we've built up a fair few conflicts, and I have some newer trees to pull in.
| * | arc: axs10x - add support of ARC PGUAlexey Brodkin2016-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Synopsys DesignWare ARC SDP boards sport ARC SDP display controller attached to ADV7511 HDMI encoder. That change adds desctiption of both ARC PGU and ADV7511 in ARC SDP'd base-board Device Tree. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: devicetree@vger.kernel.org Cc: linux-snps-arc@lists.infradead.org
* | | Merge tag 'dmaengine-4.7-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2016-05-19
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull dmaengine updates from Vinod Koul: "This time round the update brings in following changes: - new tegra driver for ADMA device - support for Xilinx AXI Direct Memory Access Engine and Xilinx AXI Central Direct Memory Access Engine and few updates to this driver - new cyclic capability to sun6i and few updates - slave-sg support in bcm2835 - updates to many drivers like designware, hsu, mv_xor, pxa, edma, qcom_hidma & bam" * tag 'dmaengine-4.7-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (84 commits) dmaengine: ioatdma: disable relaxed ordering for ioatdma dmaengine: of_dma: approximate an average distribution dmaengine: core: Use IS_ENABLED() instead of checking for built-in or module dmaengine: edma: Re-evaluate errors when ccerr is triggered w/o error event dmaengine: qcom_hidma: add support for object hierarchy dmaengine: qcom_hidma: add debugfs hooks dmaengine: qcom_hidma: implement lower level hardware interface dmaengine: vdma: Add clock support Documentation: DT: vdma: Add clock support for dmas dmaengine: vdma: Add config structure to differentiate dmas MAINTAINERS: Update Tegra DMA maintainers dmaengine: tegra-adma: Add support for Tegra210 ADMA Documentation: DT: Add binding documentation for NVIDIA ADMA dmaengine: vdma: Add Support for Xilinx AXI Central Direct Memory Access Engine Documentation: DT: vdma: update binding doc for AXI CDMA dmaengine: vdma: Add Support for Xilinx AXI Direct Memory Access Engine Documentation: DT: vdma: update binding doc for AXI DMA dmaengine: vdma: Rename xilinx_vdma_ prefix to xilinx_dma dmaengine: slave means at least one of DMA_SLAVE, DMA_CYCLIC dmaengine: mv_xor: Allow selecting mv_xor for mvebu only compatible SoC ...
| * | | dmaengine: dw: revisit data_width propertyAndy Shevchenko2016-05-02
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There several changes are done here: - Convert the property to be in bytes Besides that this is a common practice for such property, the use of a value in bytes much more convenient than handling the encoded one. - Rename data_width to data-width in the device tree bindings The change leaves the support for the old format as well just in case someone will use a newer kernel with an old device tree blob. - While here, replace dwc_fast_ffs() by __ffs() Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | | arc: axs103_smp: Fix CPU frequency to 100MHz for dual-coreAlexey Brodkin2016-05-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The most recent release of AXS103 [v1.1] is proven to work at 100 MHz in dual-core mode so this change uses mentioned feature. For that we: * Update axc003_idu.dtsi with mention of really-used CPU clock freq * Remove clock override in AXS platform code for dual-core HW Note we're still leaving a hack for clock "downgrade" on early boot for quad-core hardware. Also note this change will break functionality of AXS103 v1.0 hardware. That means all users of AXS103 __must__ upgrade their boards with the most recent firmware. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | | arc: axs10x: Add DT bindings for I2S PLL ClockJose Abreu2016-05-13
| | | | | | | | | | | | | | | | | | | | | | | | Add device tree bindings for AXS10X I2S PLL Clock driver. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Jose Abreu <joabreu@synopsys.com>
* | | ARC: [plat-eznps] Add eznps board defconfig and dtsNoam Camus2016-05-09
| | | | | | | | | | | | | | | | | | Adding default configuration file and DTS file Signed-off-by: Noam Camus <noamc@ezchip.com>
* | | ARC: [dts] Introduce Timer bindingsVineet Gupta2016-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARC Timers have historically been probed directly. As precursor to start probing Timers thru DT introduce these bindings Note that to keep series bisectable, these bindings are not yet used in code. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | | ARC: [dts] Add clk feeding into timers to DTsVineet Gupta2016-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows us to introduce timers in DT in next commit The core clk frequency hack in AXS103 platform is also extended, where the core clk feeding into timers is updated in-place in FDT. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | | ARC: [dts] Rename cpu_intc -> core_intcVineet Gupta2016-05-09
| | | | | | | | | | | | | | | | | | | | | This is again for future changes to use common DTSI for timers which refer to @core_intc Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | | ARCv2: [dts]: Introduce HS38 specific include DTS ...Vineet Gupta2016-05-09
| |/ |/| | | | | | | | | | | | | ... and add them to plat-sim DTS. This allows for future change to introduce timers in DT in single place Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | Revert "ARC: [plat-axs10x] add Ethernet PHY description in .dts"Vineet Gupta2016-04-07
|/ | | | | | | | | | | This reverts commit 667a490bdb6e27db0887d2ca515b907d6aa87118. This is needed to get ethernet(stmmac) working in 4.6-rc2 on axs103. 4.5 needed this fix, but apprently stmmac has gained some fixes which warrant reversal of this. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [plat-axs10x] add Ethernet PHY description in .dtsAlexey Brodkin2016-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | Commit e34d65696d2e ("stmmac: create of compatible mdio bus for stmmac driver") broke DW GMAC functionality on ARC AXS10x boards: That's what happens on eth0 up: --------------------------->8------------------------ | libphy: PHY stmmac-0:ffffffff not found | eth0: Could not attach to PHY | stmmac_open: Cannot attach to PHY (error: -19) --------------------------->8------------------------ Simplest solution is to add PHY description in board's .dts. And so we do here. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Rob Herring <robh@kernel.org> Cc: Phil Reid <preid@electromag.com.au> Cc: David S. Miller <davem@davemloft.net> Cc: linux-kernel@vger.kernel.org Cc: netdev@vger.kernel.org Cc: stable@vger.kernel.org # 4.5 Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* arc: [plat-nsimosci*] use ezchip network driverLada Trimasova2016-03-15
| | | | | | | | | | Since ezchip network driver was adapted to little endian architecture this patch provides the corresponding arch/arc/{boot/dts,configs}/ updates so we can switch over to this device-model/driver for OSCI platform. Cc: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Lada Trimasova <ltrimas@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [plat-nsim] document rangesVineet Gupta2016-03-12
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [plat-sim] unbork non default CONFIG_LINUX_LINK_BASEVineet Gupta2015-12-17
| | | | | | | | | | | HIGHMEM support bumped the default memory size for nsim platform to 1G. Thus total memory ended at the very edge of start of peripherals address space. With linux link base shifted, memory started bleeding into peripheral space which caused early boot bad_page spew ! Fixes: 29e332261d2 ("ARC: mm: HIGHMEM: populate high memory from DT") Reported-by: Anton Kolesov <akolesov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [axs10x] cap ethernet phy to 100 Mbit/secAlexey Brodkin2015-12-07
| | | | | | | | | | | Current ARC SDP boards cannot reliably handle 1Gbit Ethernet connections due to limitations in hardware. To make sure networking is stable on the board we're limiting phy to 100 Mbit. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* Merge tag 'devicetree-for-4.4' of ↵Linus Torvalds2015-11-06
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: "A fairly large (by DT standards) pull request this time with the majority being some overdue moving DT binding docs around to consolidate similar bindings. - DT binding doc consolidation moving similar bindings to common locations. The majority of these are display related which were scattered in video/, fb/, drm/, gpu/, and panel/ directories. - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all dtbs in the tree for most arches with dts files (except powerpc for now). - OF_IRQ=n fixes for user enabled CONFIG_OF. - of_node_put ref counting fixes from Julia Lawall. - Common DT binding for wakeup-source and deprecation of all similar bindings. - DT binding for PXA LCD controller. - Allow ignoring failed PCI resource translations in order to ignore 64-bit addresses on non-LPAE 32-bit kernels. - Support setting the NUMA node from DT instead of only from parent device. - Couple of earlycon DT parsing fixes for address and options" * tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (45 commits) MAINTAINERS: update DT binding doc locations devicetree: add Sigma Designs vendor prefix of: simplify arch_find_n_match_cpu_physical_id() function Documentation: arm: Fixed typo in socfpga fpga mgr example Documentation: devicetree: fix reference to legacy wakeup properties Documentation: devicetree: standardize/consolidate on "wakeup-source" property drivers: of: removing assignment of 0 to static variable xtensa: enable building of all dtbs mips: enable building of all dtbs metag: enable building of all dtbs metag: use common make variables for dtb builds h8300: enable building of all dtbs arm64: enable building of all dtbs arm: enable building of all dtbs arc: enable building of all dtbs arc: use common make variables for dtb builds of: add config option to enable building of all dtbs of/fdt: fix error checking for earlycon address of/overlay: add missing of_node_put of/platform: add missing of_node_put ...
| * arc: enable building of all dtbsRob Herring2015-10-27
| | | | | | | | | | | | | | | | | | | | Enable building all dtb files when CONFIG_OF_ALL_DTBS is enabled. The dtbs are not really dependent on a platform being enabled or any other kernel config, so for testing coverage it is convenient to build all of the dtbs. This builds all dts files in the tree, not just targets listed. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Vineet Gupta <vgupta@synopsys.com>
| * arc: use common make variables for dtb buildsRob Herring2015-10-27
| | | | | | | | | | | | | | | | Use dtb-y and always make variables to build dtbs instead of explicit dtbs rule. This is in preparation to support building all dtbs. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: mm: HIGHMEM: populate high memory from DTVineet Gupta2015-10-28
| | | | | | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | ARC: Ensure DT mem base is same as what kernel is built withVineet Gupta2015-10-28
|/ | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: add/fix some comments in code - no functional changeVineet Gupta2015-08-20
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: [axs103] bump CPU frequency from 75 to 90 MHZAlexey Brodkin2015-07-09
| | | | | | | | With up-to-date FPGA builds ARC cores are supposed to correctly operate even with 90 MHz clock (which is a target frequency for AXS103 release). Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: arc-linux-dev@synopsys.com
* ARCv2: [vdk] dts files and defconfig for HS38 VDKRuud Derwig2015-06-25
| | | | | | | | | | | | | - CONFIG_ARC_UBOOT_SUPPORT to handle arguments passed in r0, r1, r2 - CONFIG_DEVTMPFS_MOUNT for mouting rootfs since it uses external cpio for rootfs Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Ruud Derwig <rderwig@synopsys.com> [vgupta: folded the Main baord DT files for smp/up into one] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x coresVineet Gupta2015-06-25
| | | | | | | Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [axs101] Prepare for AXS103Alexey Brodkin2015-06-25
| | | | | | | | | | To avoid duplicating the MB DTS file, move the MB intc entry into cpu card specific file Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARCv2: [nsim*hs*] Support simulation platforms for HS38x coresVineet Gupta2015-06-25
| | | | | | | Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [axs101] STAR 9000799830: Fix SD cards supportAlexey Brodkin2015-06-19
| | | | | | | | | | | | | | As DW Mobile Storage databook says it's required to use "Hold Register" if card is enumerated in SDR12 or SDR25 modes. It means we need to act in the same way as in Altera's Socfpga implementation - set "use hold reg" bit in commad. Note that for upstream proper solution would be to remove dw_mci_pltfm_prepare_command() at all and set the bit right in dw_mci_prepare_command() for all platforms. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [axs101] support early 8250 uartVineet Gupta2015-06-19
| | | | | | | | | | | | | | | | | Earlycon calculates UART clock as "BASE_BAUD * 16". In case of ARC "BASE_BAUD" is calculated dynamically in runtime, basically it is an alias to arc_early_base_baud(), which in turn just does "arc_base_baud/16". 8250 UART on AXS/SDP board uses 33.3MHz clock source which is set in "arc_base_baud" with this change. Additional compatibility string "snps,arc-sdp" is introduced as well because there're different flavours of AXS boards but they all share the same motherboard and so it's possible to re-use the same code for motherbord even if CPU daughterboard changes. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [axs101] Add support for AXS101 SDP (software development platform)Alexey Brodkin2015-06-19
| | | | | | | | | | The AXS10x platforms consist of a mainboard with peripherals, on which several daughter cards can be placed. The daughter cards typically contain a CPU and memory. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: [plat_arcfpga]->[plat_sim]Vineet Gupta2015-06-19
| | | | | | | | * Remove remanants of legacy ARC FPGA platforms (AA4, ML509...) * Only nsim simulation platform is left, rename platform accordingly * AA4 DT stuff is compatible with nsim for ARC700 so rename it too Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* ARC: perf: Rename DT binding to not confuse with power mgmtVineet Gupta2015-04-20
| | | | Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* dmaengine: dw: define DW_DMA_MAX_NR_MASTERSAndy Shevchenko2015-02-04
| | | | | | | | | | | Instead of using magic number in the code the patch provides DW_DMA_MAX_NR_MASTERS constant. While here, restrict the reading of data width array by amount of the actual number of AHB masters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* ARC: [nsimosci] move peripherals to match model to FPGAVineet Gupta2014-12-15
| | | | | | | This allows the sdplite/Zebu images to run on OSCI simulation platform Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: <stable@vger.kernel.org> #3.10, 3.12, 3.14, 3.16
* ARC: [nsimosci] Allow "headless" models to bootVineet Gupta2014-10-13
| | | | | | | | | | | | | There are certain test configuration of virtual platform which don't have any real console device (uart/pgu). So add tty0 as a fallback console device to allow system to boot and be accessible via telnet Otherwise with ttyS0 as only console, but 8250 disabled in kernel build, init chokes. Reported-by: Anton Kolesov <akolesov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: <stable@vger.kernel.org> #3.10, 3.12, 3.14, 3.16
* ARC: [arcfpga] consolidate machine description, DTVineet Gupta2014-10-13
| | | | | | | * AA4/ML509 have same machine descriptions * Rename simulation machine description Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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