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* irqchip: irq-armada-370-xp: Use cpu notifier to initialize secondary CPUsThomas Petazzoni2014-05-08
| | | | | | | | | | | | | | | | | Some irqchip initialization must be done on secondary CPUs. On mvebu platforms, this is currently achieved by having the arch/arm/mach-mvebu/platsmp.c code directly call into a function exported by the irqchip driver, which isn't really nice. This commit changes this by using the same solution as the one used in the GIC driver: the irqchip driver registers a CPU notifier, which is used to do the secondary CPU IRQ initialization. This way, the irqchip driver is completely autonomous, and the function no longer needs to be exposed from the irqchip driver to the SoC code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483648-26611-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: irq-armada-370-xp: Do the set_smp_cross_call() in the driverThomas Petazzoni2014-05-08
| | | | | | | | | | | | | Instead of having the SoC code in arch/arm/mach-mvebu/platsmp.c do the set_smp_cross_call() to register the IPI-triggering function, it makes more sense to do exactly what the GIC driver is doing: let the irqchip driver do it. This way, it avoids having to expose the armada_mpic_send_doorbell() function between the irqchip driver and the SoC code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483648-26611-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: move Armada 370/XP specific definitions to armada-370-xp.hThomas Petazzoni2013-12-27
| | | | | | | | | | In preparation to the introduction of the support for additional SoC, the mvebu/common.h should be clear of Armada 370/XP-specific definitions. Therefore, move the Armada 370/XP SMP specific definitions to the armada-370-xp.h file. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: move ARMADA_XP_MAX_CPUS to armada-370-xp.hThomas Petazzoni2013-12-25
| | | | | | | | | | | | | The ARMADA_XP_MAX_CPUS definition was in common.h, which as its name says, is common to all mvebu SoCs. It is more logical to have this XP specific definition in the already existing armada-370-xp.h header file, especially in preparation to the addition of the support for other SOCs in mach-mvebu. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: don't hardcode the physical address for mvebu-mbusThomas Petazzoni2013-06-13
| | | | | | | | | | | | | | | | | | Since the mvebu-mbus driver doesn't yet have a DT binding (and this DT binding may not necessarily be ready for 3.11), the physical address of the mvebu-mbus registers are currently hardcoded. This doesn't play well with the fact that the internal registers base address may be different depending on the bootloader. In order to have only one central place for the physical address of the internal registers, we now use of_translate_address() to translate the mvebu-mbus register offsets into the real physical address, by using DT-based address translation. This will go away once the mvebu-mbus driver gains a proper DT binding. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: remove hardcoded static I/O mappingThomas Petazzoni2013-06-13
| | | | | | | | | | | | Now that we have removed the need of the static I/O mapping for early initialization reasons, and fixed the registers area length that were broken, we can get rid of the static I/O mapping. Only the earlyprintk mapping needs to be set up, using the debug_ll_io_init() helper function. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Align the internal registers virtual base to support LPAELior Amsalem2013-04-15
| | | | | | | | | | | In order to be able to support the LPAE, the internal registers virtual base must be aligned to 2MB. In LPAE section size is 2MB, in earlyprintk we map the internal registers and it must be section aligned. Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mach-mvebu: convert to use mvebu-mbus driverThomas Petazzoni2013-04-15
| | | | | | | | | | | | | | | | | The changes needed to migrate the mach-mvebu (Armada 370 and Armada XP) to the mvebu-mbus driver are fairly minimal, since not many devices currently supported on those SoCs use address decoding windows. The only one being the BootROM window, used to bring up secondary CPUs. However, this BootROM window needed for SMP brings an important requirement: the mvebu-mbus driver must be initialized at the ->early_init() time, otherwise the BootROM window cannot be setup early enough to be ready before the secondary CPUs are started. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* arm: mvebu: Add IPI support via doorbellsGregory CLEMENT2012-11-21
| | | | | | | | This patch enhances the IRQ controller driver to add support for Inter-Processor-Interrupts that are needed to enable SMP support. Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* Merge branch 'kirkwood/addr_decode' of ↵Olof Johansson2012-09-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into late/kirkwood * 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux: arm: mvebu: add address decoding controller to the DT arm: mvebu: add basic address decoding support to Armada 370/XP arm: plat-orion: make bridge_virt_base non-const to support DT use case arm: plat-orion: introduce PLAT_ORION_LEGACY hidden config option arm: plat-orion: use void __iomem pointers for addr-map functions arm: plat-orion: use void __iomem pointers for time functions arm: plat-orion: use void __iomem pointers for MPP functions arm: plat-orion: use void __iomem pointers for UART registration functions arm: mach-mvebu: use IOMEM() for base address definitions arm: mach-orion5x: use IOMEM() for base address definitions arm: mach-mv78xx0: use IOMEM() for base address definitions arm: mach-kirkwood: use IOMEM() for base address definitions arm: mach-dove: use IOMEM() for base address definitions arm: mach-orion5x: use plus instead of or for address definitions arm: mach-mv78xx0: use plus instead of or for address definitions arm: mach-kirkwood: use plus instead of or for address definitions arm: mach-dove: use plus instead of or for address definitions This branch had quite a few conflicts, in particular with the PCI static map rework from Rob Herring, and a few other context conflicts due to changes in Kconfig, etc. I fixed up conflicts in: arch/arm/Kconfig arch/arm/mach-dove/common.c arch/arm/mach-dove/include/mach/dove.h arch/arm/mach-kirkwood/common.c arch/arm/mach-kirkwood/include/mach/kirkwood.h arch/arm/mach-mv78xx0/common.c arch/arm/mach-mv78xx0/include/mach/mv78xx0.h arch/arm/mach-orion5x/common.c arch/arm/mach-orion5x/include/mach/orion5x.h Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: mvebu: move armada-370-xp.h in mach dirRob Herring2012-09-14
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch>