summaryrefslogtreecommitdiff
path: root/arch/sh/include/cpu-sh4
Commit message (Collapse)AuthorAge
* sh: sh7757: remove nonexistent GPIO_PT[JLNQ]7_RESV to fix pinctrl registrationGeert Uytterhoeven2017-10-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3810e96056ff ("sh: modify pinmux for SH7757 2nd cut") renamed GPIO_PT[JLNQ]7 to GPIO_PT[JLNQ]7_RESV, and removed the existing users from the pinmux_pins[] array. However, pinmux_pins[] is initialized through PINMUX_GPIO(), using designated array initializers, where the GPIO_* enums serve as indices. Hence entries were not really removed, but replaced by (zero-filled) holes. Such entries are treated as pin zero, which was registered before, thus leading to pinctrl registration failures, as seen on sh7722: sh-pfc pfc-sh7722: pin 0 already registered sh-pfc pfc-sh7722: error during pin registration sh-pfc pfc-sh7722: could not register: -22 sh-pfc: probe of pfc-sh7722 failed with error -22 Remove GPIO_PT[JLNQ]7_RESV from the enum to fix this. Link: http://lkml.kernel.org/r/1505205657-18012-3-git-send-email-geert+renesas@glider.be Fixes: 3810e96056ffddf6 ("sh: modify pinmux for SH7757 2nd cut") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Jacopo Mondi <jacopo+renesas@jmondi.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Rich Felker <dalias@libc.org> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sh: sh7722: remove nonexistent GPIO_PTQ7 to fix pinctrl registrationGeert Uytterhoeven2017-10-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch series "sh: sh7722/sh7757i/sh7264/sh7269: Fix pinctrl registration", v2. Magnus Damm reported that on sh7722/Migo-R, pinctrl registration fails with: sh-pfc pfc-sh7722: pin 0 already registered sh-pfc pfc-sh7722: error during pin registration sh-pfc pfc-sh7722: could not register: -22 sh-pfc: probe of pfc-sh7722 failed with error -22 pinmux_pins[] is initialized through PINMUX_GPIO(), using designated array initializers, where the GPIO_* enums serve as indices. Apparently GPIO_PTQ7 was defined in the enum, but never used. If enum values are defined, but never used, pinmux_pins[] contains (zero-filled) holes. Hence such entries are treated as pin zero, which was registered before, and pinctrl registration fails. I can't see how this ever worked, as at the time of commit f5e25ae52fef ("sh-pfc: Add sh7722 pinmux support"), pinmux_gpios[] in drivers/pinctrl/sh-pfc/pfc-sh7722.c already had the hole, and drivers/pinctrl/core.c already had the check. Some scripting revealed a few more broken drivers: - sh7757 has four holes, due to nonexistent GPIO_PT[JLNQ]7_RESV. - sh7264 and sh7269 define GPIO_PH[0-7], but don't use it with PINMUX_GPIO(). Patch 1 fixes the issue on sh7722, and was tested. Patches 3-4 should fix the issue on the other 3 SoCs, but was untested due to lack of hardware. This patch (of 4): On sh7722/Migo-R, pinctrl registration fails with: sh-pfc pfc-sh7722: pin 0 already registered sh-pfc pfc-sh7722: error during pin registration sh-pfc pfc-sh7722: could not register: -22 sh-pfc: probe of pfc-sh7722 failed with error -22 pinmux_pins[] is initialized through PINMUX_GPIO(), using designated array initializers, where the GPIO_* enums serve as indices. As GPIO_PTQ7 is defined in the enum, but never used, pinmux_pins[] contains a (zero-filled) hole. Hence this entry is treated as pin zero, which was registered before, and pinctrl registration fails. According to the datasheet, port PTQ7 does not exist. Hence remove GPIO_PTQ7 from the enum to fix this. Link: http://lkml.kernel.org/r/1505205657-18012-2-git-send-email-geert+renesas@glider.be Fixes: 8d7b5b0af7e070b9 ("sh: Add sh7722 pinmux code") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reported-by: Magnus Damm <magnus.damm@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Cc: Rich Felker <dalias@libc.org> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sh: remove CPU_SUBTYPE_SH7764Richard Weinberger2014-08-06
| | | | | | | | | | | | | The symbol is an orphan, get rid of it. Submitted by Richard a few months ago as "[PATCH 21/28] Remove CPU_SUBTYPE_SH7764". [pebolle@tiscali.nl: re-added dropped ||] Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sh: prefix sh-specific "CCR" and "CCR2" by "SH_"Geert Uytterhoeven2014-03-04
| | | | | | | | | | | | | | | | | | | | | | Commit bcf24e1daa94 ("mmc: omap_hsmmc: use the generic config for omap2plus devices"), enabled the build for other platforms for compile testing. sh-allmodconfig now fails with: include/linux/omap-dma.h:171:8: error: expected identifier before numeric constant make[4]: *** [drivers/mmc/host/omap_hsmmc.o] Error 1 This happens because SuperH #defines "CCR", which is one of the enum values in include/linux/omap-dma.h. There's a similar issue with "CCR2" on sh2a. As "CCR" and "CCR2" are too generic names for global #defines, prefix them with "SH_" to fix this. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sh: sh7786: Fix port E, G and J GPIOsLaurent Pinchart2013-01-25
| | | | | | | | | The port E, G and J GPIOs don't match the SoC datasheet (they seem to have been copied from the SH7785). Fix them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh: sh7723: Rename GPIO_FN_SIUOSPD to GPIO_FN_SIUAOSPDLaurent Pinchart2013-01-25
| | | | | | | | | The GPIO was incorrectly named. As it has no user in the whole kernel tree, just rename it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh: modify the sh_dmae_slave_config for RSPI in setup-sh7757Shimoda, Yoshihiro2012-07-26
| | | | | | | Modify the sh7757_dmae1_slave to add paramters of RSPI's slave_id. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Tidy up some of the cpu legacy dma header mess.Paul Mundt2012-05-19
| | | | | | | | | | This has turned in to quite a mess, and with CPUs that care using dmaengine now it's about time to start cleaning up after the legacy DMA code. For starters, kill off the stubs for the CPUs that don't do anything, as well as all of the unused definitions. This leaves us with a set of IRQs and base addresses we can deal with later. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move sh4a dma header from cpu-sh4 to cpu-sh4a.Paul Mundt2012-05-19
| | | | | | | cpu-sh4a headers take priority over cpu-sh4 ones by virtue of the build system, there's no need to try and mingle sh4a stuff in cpu-sh4. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'sh/evt2irq-migration' into sh-latestPaul Mundt2012-05-18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/sh/kernel/cpu/sh3/setup-sh770x.c arch/sh/kernel/cpu/sh3/setup-sh7710.c arch/sh/kernel/cpu/sh3/setup-sh7720.c arch/sh/kernel/cpu/sh4/setup-sh7750.c arch/sh/kernel/cpu/sh4a/setup-sh7343.c arch/sh/kernel/cpu/sh4a/setup-sh7366.c arch/sh/kernel/cpu/sh4a/setup-sh7722.c arch/sh/kernel/cpu/sh4a/setup-sh7723.c arch/sh/kernel/cpu/sh4a/setup-sh7724.c arch/sh/kernel/cpu/sh4a/setup-sh7757.c arch/sh/kernel/cpu/sh4a/setup-sh7763.c arch/sh/kernel/cpu/sh4a/setup-sh7770.c arch/sh/kernel/cpu/sh4a/setup-sh7785.c arch/sh/kernel/cpu/sh4a/setup-sh7786.c Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: cpu dma evt2irq migration.Paul Mundt2012-05-18
| | | | | | | | | | | | | | This migrates the cpu-family relative DMA IRQ definitions over to evt2irq() backed hwirq lookups. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Add initial support for SH7734 CPU subtypeNobuhiro Iwamatsu2012-04-17
|/ | | | | | | | This implements initial support for the SH7734. This adds support SCIF, TMU and RTC. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: dma: Collect up CHCR of SH7763, SH7764, SH7780 and SH7785Nobuhiro Iwamatsu2012-03-28
| | | | | | | | CHCR of SH7763, SH7764, SH7780 and SH7785 is constitution same as SH7757. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Reviewed-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: dma: Collect up CHCR of SH7723 and SH7730Nobuhiro Iwamatsu2012-03-28
| | | | | | | | CHCR of SH7723 and SH7730 is constitution same as SH7724. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Reviewed-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'sh/hwblk' into sh-latestPaul Mundt2012-01-12
|\
| * sh: sh7722: fix Oops: remove empty clock entriesGuennadi Liakhovetski2011-11-24
| | | | | | | | | | | | | | | | | | Unused indices produce empty entries in the clock array, which then lead to Oopses at boot-time. Reported-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: sh7723.h: bugfix: remove unused clock indexKuninori Morimoto2011-11-24
| | | | | | | | | | | | | | | | | | | | | | | | Current sh clocks are using pm_runtime frame work instead of old hwblk. So, HWBLK_UNKNOWN, HWBLK_DBG and HWBLK_SUBC are not needed for now. Now mstp32 clocks are registered by sh_clk_mstp32_register(), but the clock which isn't defined by SH_CLK_MSTP32() macro will be crash. because it doesn't have enable_reg. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: sh7724.h: bugfix: remove unused clock indexKuninori Morimoto2011-11-24
| | | | | | | | | | | | | | | | | | | | | | | | Current sh clocks are using pm_runtime frame work instead of old hwblk. So, HWBLK_UNKNOWN and HWBLK_DBG are not needed for now. Now mstp32 clocks are registered by sh_clk_mstp32_register(), but the clock which isn't defined by SH_CLK_MSTP32() macro will be crash. because it doesn't have enable_reg. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: clkfwk: clock-sh7724: all div6_clks use SH_CLK_DIV6_EXT()Kuninori Morimoto2011-12-06
|/ | | | | | | | | | Current div6 clocks can specify their current parent clocks from its register value if it is registered by sh_clk_div6_reparent_register(). This patch modifies all div6 clocks into SH_CLK_DIV6_EXT(). Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7724: Add USBHS DMAEngine supportKuninori Morimoto2011-06-16
| | | | | Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: mark DMA slave ID 0 as invalidGuennadi Liakhovetski2011-05-25
| | | | | | | | This makes it possible to leave DMA slave IDs in the platform data at default 0 value without hitting DMA channel allocation error paths. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: dmaengine support for SH7757Yoshihiro Shimoda2011-03-11
| | | | | Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add div6_reparent_clks to clock framework for FSIKuninori Morimoto2010-11-29
| | | | | | | | | | | | Current clk_ops doesn't support .init which is used to select external clock on ecovec without CONFIG_SH_CLK_CPG_LEGACY. To solve this problem, this patch add div6_reparent_clks to clock-sh7724. This patch solve compile error too. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: pinmux support for SH-X3 proto CPUs.Paul Mundt2010-10-02
| | | | | | | This adds in support for GPIO/pinmux on the SH-X3 proto CPUs. This will subsequently be used by the x3proto board. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Update SH-X3 subtype for clkdev lookups.Paul Mundt2010-10-01
| | | | | | Rewrite the SH-X3 proto CPU clock framework for clkdev. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: modify pinmux for SH7757 2nd cutYoshihiro Shimoda2010-07-06
| | | | | Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: add romImage MMCIF boot for sh7724 and Ecovec V2Magnus Damm2010-05-31
| | | | | | | | | | | This patch is V2 of the MMCIF romImage boot support for sh7724 and the Ecovec board. With this patch applied and CONFIG_ROMIMAGE_MMCIF selected the romImage kernel image can be written to a MMC card and booted directly by the sh7724 cpu. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: define DMA slaves per CPU type, remove now redundant headerGuennadi Liakhovetski2010-05-22
| | | | | | | | | Now that DMA slave IDs are only used used in platform specific code and have become opaque cookies for the rest of the code, we can make the, CPU specific too. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'sh/stable-updates'Paul Mundt2010-04-26
|\ | | | | | | | | | | | | | | Conflicts: arch/sh/kernel/dwarf.c drivers/dma/shdma.c Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * SH: fix TS field shift calculation for DMA driversGuennadi Liakhovetski2010-04-26
| | | | | | | | | | | | | | | | CHCR_TS_HIGH_SHIFT is defined as a shift of TS high bits in CHCR register, relative to low bits. The TS_INDEX2VAL() macro has to take this into account. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: dmaengine support for SH7786 DMAC0.Paul Mundt2010-04-13
| | | | | | | | | | | | Hook up DMAC0 on SH7786. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Disable MMUCR_AT for SH-4 nommu.Paul Mundt2010-04-07
| | | | | | | | | | | | | | | | Presently address translation is default-enabled regardless of whether CONFIG_MMU is set or not in the SH-4 case, this fixes it up, and also makes the control init word a bit more readable in the process. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: tlb debugfs support.Matt Fleming2010-03-29
|/ | | | | | | Export the status of the utlb and itlb entries through debugfs. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: update the TLB replacement counter for entry wiring.Matt Fleming2010-03-26
| | | | | | | | | | Presently the TLB wiring code depends on MMUCR.URB for working out where to place the wired entry, but fails to take the replacment counter in to consideration. This fixes up the wiring logic and ensures that wired entries remain so. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Flush ITLB too in PTEAEX's flush_tlb_page()Matt Fleming2010-03-23
| | | | | | | | | flush_tlb_page() can be used to flush TLB entries that map executable pages. Therefore, we need to ensure that the ITLB is also flushed in local_flush_tlb_page(). Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add watch-dog register address for SH7722/SH7723/SH7724Kuninori Morimoto2010-03-23
| | | | | Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: merge sh7722 and sh7724 DMA register definitionsGuennadi Liakhovetski2010-03-02
| | | | | | | DMA CHCR register layout is equal on sh7722 and sh7724, reuse definitions. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* dmaengine: shdma: separate DMA headers.Guennadi Liakhovetski2010-03-02
| | | | | | | | | | Separate SH DMA headers into ones, commonly used by both drivers, and ones, specific to each of them. This will make the future development of the dmaengine driver easier. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up more 64-bit pgprot truncation on SH-X2 TLB.Paul Mundt2010-02-17
| | | | | | | | | | | Both the store queue API and the PMB remapping take unsigned long for their pgprot flags, which cuts off the extended protection bits. In the case of the PMB this isn't really a problem since the cache attribute bits that we care about are all in the lower 32-bits, but we do it just to be safe. The store queue remapping on the other hand depends on the extended prot bits for enabling userspace access to the mappings. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'sh/dmaengine'Paul Mundt2010-02-08
|\ | | | | | | | | Conflicts: arch/sh/drivers/dma/dma-sh.c
| * sh: implement DMA_SLAVE capability in SH dmaengine driverGuennadi Liakhovetski2010-02-08
| | | | | | | | | | | | | | | | Tested to work with a SIU ASoC driver on sh7722 (migor). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: fix Transfer Size calculation in both DMA driversGuennadi Liakhovetski2010-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: mach-sdk7786: Probe system FPGA area mapping.Paul Mundt2010-01-20
| | | | | | | | | | | | | | | | | | | | | | | | | | This implements dynamic probing for the system FPGA. The system reset controller contains a fixed magic read word in order to identify the FPGA. This just utilizes a simple loop that scans across all of the fixed physical areas (area 0 through area 6) to locate the FPGA. The FPGA also contains register information detailing the area mappings and chip select settings for all of the other blocks, so this needs to be done before we can set up anything else. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: New extended page flag to wire/unwire TLB entriesMatt Fleming2010-01-16
| | | | | | | | | | | | | | | | Provide a new extended page flag, _PAGE_WIRED and an SH4 implementation for wiring TLB entries and use it in the fixmap code path so that we can wire the fixmap TLB entry. Signed-off-by: Matt Fleming <matt@console-pimps.org>
* | sh: Kill off dead UBC headers.Paul Mundt2010-01-05
|/ | | | | | Nothing is using these now, so kill them all off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: dmaengine support for sh7724.Guennadi Liakhovetski2009-12-17
| | | | | | | | Add a dmaengine platform device to sh7724, fix DMA channel interrupt numbers. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: fix watchdog timer for sh7780/sh7785Valentin R Sitsikov2009-10-27
| | | | | Signed-off-by: Valentin Sitdikov <valentin.sitdikov@siemens.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'master' into sh/smpPaul Mundt2009-09-01
|\ | | | | | | | | Conflicts: arch/sh/mm/cache-sh4.c
| * sh: Add initial support for SH7757 CPU subtypeYoshihiro Shimoda2009-08-21
| | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Migrate SH-4 cacheflush ops to function pointers.Paul Mundt2009-08-15
| | | | | | | | | | | | | | | | | | | | This paves the way for allowing individual CPUs to overload the individual flushing routines that they care about without having to depend on weak aliases. SH-4 is converted over initially, as it wires up pretty much everything. The majority of the other CPUs will simply use the default no-op implementation with their own region flushers wired up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
generated by cgit v1.2.1 (git 2.18.0) at 2024-07-12 02:48:12 +0000