org/kernel/linux.git - Linux Kernel Tree

	Commit message (Collapse)	Author	Age
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*	drm/radeon/cik: log and handle VM page fault interrupts	Alex Deucher	2013-06-25
\| \| \| \|	Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
*	drm/radeon: add support for interrupts on CIK (v5)	Alex Deucher	2013-06-25
\| \| \| \| \| \| \| \| \| \| \| \|	Todo: - handle interrupts for compute queues v2: add documentation v3: update to latest reset code v4: update to latest illegal CP handling v5: fix missing break in interrupt handler switch statement Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
*	drm/radeon: Add support for RLC init on CIK (v4)	Alex Deucher	2013-06-25
\| \| \| \| \| \| \| \| \| \| \|	RLC handles the interrupt controller and other tasks on the GPU. v2: add documentation v3: update programming sequence v4: additional setup Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
*	drm/radeon: add IB and fence dispatch functions for CIK gfx (v7)	Alex Deucher	2013-06-25
\| \| \| \| \| \| \| \| \| \| \| \| \|	For gfx ring only. Compute is still todo. v2: add documentation v3: update to latest reset changes, integrate emit update patch. v4: fix count on wait_reg_mem for HDP flush v5: use old hdp flush method for fence v6: set valid bit for IB v7: cleanup for release Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
*	drm/radeon: Add CP init for CIK (v7)	Alex Deucher	2013-06-25
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Sets up the GFX ring and loads ucode for GFX and Compute. Todo: - handle compute queue setup. v2: add documentation v3: integrate with latest reset changes v4: additional init fixes v5: scratch reg write back no longer supported on CIK v6: properly set CP_RB0_BASE_HI v7: rebase Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
*	drm/radeon: add support mc ucode loading on CIK (v2)	Alex Deucher	2013-06-25
\| \| \| \| \| \| \| \|	Load the GDDR5 ucode and train the links. v2: update ucode Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
*	drm/radeon/cik: stop page faults from hanging the system (v2)	Alex Deucher	2013-06-25
\| \| \| \| \| \| \| \| \|	Redirect invalid memory accesses to the default page instead of locking up the memory controller. v2: rebase on top of 2 level PTs Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
*	drm/radeon: add support for MC/VM setup on CIK (v6)	Alex Deucher	2013-06-25
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	The vm callbacks are the same as the SI ones right now (same regs and bits). We could share the SI variants, and I may yet do that, but I figured I would add CIK specific ones for now in case we need to change anything. V2: add documentation, minor fixes. V3: integrate vram offset fixes for APUs V4: enable 2 level VM PTs V5: index SH_MEM_* regs properly V6: add ib_parse() Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
*	drm/radeon: Add support for CIK GPU reset (v2)	Alex Deucher	2013-06-25
\| \| \| \| \| \| \| \|	v2: split soft reset into compute and gfx. Still need to make reset more fine grained, but this should be a start. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
*	drm/radeon: add gpu init support for CIK (v9)	Alex Deucher	2013-06-25
	v2: tiling fixes v3: more tiling fixes v4: more tiling fixes v5: additional register init v6: rebase v7: fix gb_addr_config for KV/KB v8: drop wip KV bits for now, add missing config reg v9: fix cu count on Bonaire Signed-off-by: Alex Deucher <alexander.deucher@amd.com>