From e6d20c55a4d94eca419f80f996133f523ecedfe0 Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Tue, 10 Jan 2017 23:30:23 +0900 Subject: openrisc: entry: Fix delay slot detection Use execption SR stored in pt_regs for detection, the current SR is not correct as the handler is running after return from exception. Also, The code that checks for a delay slot uses a flag bitmask and then wants to check if the result is not zero. The test it implemented was wrong. Correct it by changing the test to check result against non zero. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/entry.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/openrisc') diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S index daae2a423c3a..bc6500860f4d 100644 --- a/arch/openrisc/kernel/entry.S +++ b/arch/openrisc/kernel/entry.S @@ -258,9 +258,9 @@ EXCEPTION_ENTRY(_data_page_fault_handler) #else - l.mfspr r6,r0,SPR_SR // SR + l.lwz r6,PT_SR(r3) // SR l.andi r6,r6,SPR_SR_DSX // check for delay slot exception - l.sfeqi r6,0x1 // exception happened in delay slot + l.sfne r6,r0 // exception happened in delay slot l.bnf 7f l.lwz r6,PT_PC(r3) // address of an offending insn -- cgit v1.2.1