From f8d3bc10041914cceef4585a38cfdc071724b2a7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 8 Dec 2017 14:46:41 +0100 Subject: eeprom: at25: Add DT support for EEPROMs with odd address bits Certain EEPROMS have a size that is larger than the number of address bytes would allow, and store the MSB of the address in bit 3 of the instruction byte. This can be described in platform data using EE_INSTR_BIT3_IS_ADDR, or in DT using the obsolete legacy "at25,addr-mode" property. But currently there exists no non-deprecated way to describe this in DT. Hence extend the existing "address-width" DT property to allow specifying 9 address bits, and enable support for that in the driver. This has been tested with a Microchip 25LC040A. Signed-off-by: Geert Uytterhoeven Reviewed-by: Rob Herring Signed-off-by: Greg Kroah-Hartman --- drivers/misc/eeprom/at25.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/misc/eeprom/at25.c') diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c index 5afe4cd16569..9282ffd607ff 100644 --- a/drivers/misc/eeprom/at25.c +++ b/drivers/misc/eeprom/at25.c @@ -276,6 +276,9 @@ static int at25_fw_to_chip(struct device *dev, struct spi_eeprom *chip) return -ENODEV; } switch (val) { + case 9: + chip->flags |= EE_INSTR_BIT3_IS_ADDR; + /* fall through */ case 8: chip->flags |= EE_ADDR1; break; -- cgit v1.2.1