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authorStephen Boyd <sboyd@codeaurora.org>2017-06-16 15:01:46 -0700
committerStephen Boyd <sboyd@codeaurora.org>2017-06-16 15:01:46 -0700
commit4dea04c1f113a848cec8722d2401127227623820 (patch)
tree6339770db64cc56c1b6370f560fa03fe79749130 /MAINTAINERS
parentef748cb39d96e96094c09d15cc50e4d7c63a606f (diff)
parent215c80a7d65312911ca7b08d42b05652e27eed5f (diff)
downloadlinux-4dea04c1f113a848cec8722d2401127227623820.tar.gz
linux-4dea04c1f113a848cec8722d2401127227623820.tar.xz
Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into clk-next
Pull Amlogic clk driver updates from Jerome Brunet: * Expose more clock gate on meson8 (SAR ADC, RNG, USB, SDIO, ETH) * Add new compatible to the meson8 clock controller for meson8b * Add missing parents to gxbb clk81 * tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson: clk: meson: gxbb: add all clk81 parents clk: meson: meson8b: add compatibles for Meson8 and Meson8m2 clk: meson8b: export the ethernet gate clock clk: meson8b: export the USB clocks clk: meson8b: export the gate clock for the HW random number generator clk: meson8b: export the SDIO clock clk: meson8b: export the SAR ADC clocks
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