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author | Dan Williams <dan.j.williams@intel.com> | 2017-11-15 16:56:11 -0800 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2017-11-15 16:56:11 -0800 |
commit | 4247f24c23589bcc3bc3490515ef8c9497e9ae55 (patch) | |
tree | 89726a0e171c443a3e8def2992b56dbd8a21df21 /arch/arm64/mm/fault.c | |
parent | 79ab67ede21f536851a99ea68ee6fc1f5435e055 (diff) | |
parent | 9f586fff6574f6ecbf323f92d44ffaf0d96225fe (diff) | |
download | linux-4247f24c23589bcc3bc3490515ef8c9497e9ae55.tar.gz linux-4247f24c23589bcc3bc3490515ef8c9497e9ae55.tar.xz |
Merge branch 'for-4.15/dax' into libnvdimm-for-next
Diffstat (limited to 'arch/arm64/mm/fault.c')
-rw-r--r-- | arch/arm64/mm/fault.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index 89993c4be1be..b64958b23a7f 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -97,7 +97,7 @@ static void data_abort_decode(unsigned int esr) (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT, (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT); } else { - pr_alert(" ISV = 0, ISS = 0x%08lu\n", esr & ESR_ELx_ISS_MASK); + pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK); } pr_alert(" CM = %lu, WnR = %lu\n", @@ -651,7 +651,7 @@ static const struct fault_info fault_info[] = { { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" }, { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" }, { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" }, - { do_page_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, + { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, { do_bad, SIGBUS, 0, "unknown 8" }, { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" }, { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" }, |