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author | Ley Foon Tan <lftan@altera.com> | 2014-11-06 15:19:48 +0800 |
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committer | Ley Foon Tan <lftan@altera.com> | 2014-12-08 12:55:54 +0800 |
commit | 93c91cb228e76bd93a34979d17151862b4b22c28 (patch) | |
tree | 72b9f0b84c85b399d116c7ad2cbacd553afa1c85 /arch/nios2/include/asm/cache.h | |
parent | 71995e4d004f6afbc86cc4a80c4a281f6c00b07f (diff) | |
download | linux-93c91cb228e76bd93a34979d17151862b4b22c28.tar.gz linux-93c91cb228e76bd93a34979d17151862b4b22c28.tar.xz |
nios2: Cache handling
This patch adds functionality required for cache maintenance.
Signed-off-by: Ley Foon Tan <lftan@altera.com>
Diffstat (limited to 'arch/nios2/include/asm/cache.h')
-rw-r--r-- | arch/nios2/include/asm/cache.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/nios2/include/asm/cache.h b/arch/nios2/include/asm/cache.h new file mode 100644 index 000000000000..2293cf57e307 --- /dev/null +++ b/arch/nios2/include/asm/cache.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2004 Microtronix Datacom Ltd. + * + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or + * NON INFRINGEMENT. See the GNU General Public License for more + * details. + */ + +#ifndef _ASM_NIOS2_CACHE_H +#define _ASM_NIOS2_CACHE_H + +#define NIOS2_DCACHE_SIZE CONFIG_NIOS2_DCACHE_SIZE +#define NIOS2_ICACHE_SIZE CONFIG_NIOS2_ICACHE_SIZE +#define NIOS2_DCACHE_LINE_SIZE CONFIG_NIOS2_DCACHE_LINE_SIZE +#define NIOS2_ICACHE_LINE_SHIFT 5 +#define NIOS2_ICACHE_LINE_SIZE (1 << NIOS2_ICACHE_LINE_SHIFT) + +/* bytes per L1 cache line */ +#define L1_CACHE_SHIFT NIOS2_ICACHE_LINE_SHIFT +#define L1_CACHE_BYTES NIOS2_ICACHE_LINE_SIZE + +#define ARCH_DMA_MINALIGN L1_CACHE_BYTES + +#define __cacheline_aligned +#define ____cacheline_aligned + +#endif |