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| author | Ross Zwisler <ross.zwisler@linux.intel.com> | 2018-02-03 00:26:10 -0700 |
|---|---|---|
| committer | Ross Zwisler <ross.zwisler@linux.intel.com> | 2018-02-03 00:26:10 -0700 |
| commit | d121f07691415df824e6b60520f782f6d13b3c81 (patch) | |
| tree | 422ad3cc6fd631604fef4e469e49bacba8202e52 /arch/x86/lib/delay.c | |
| parent | 59858d3d54cfad1f8db67c2c07e4dd33bb6ed955 (diff) | |
| parent | 569d0365f571fa6421a5c80bc30d1b2cdab857fe (diff) | |
| download | linux-d121f07691415df824e6b60520f782f6d13b3c81.tar.gz linux-d121f07691415df824e6b60520f782f6d13b3c81.tar.xz | |
Merge branch 'for-4.16/dax' into libnvdimm-for-next
Diffstat (limited to 'arch/x86/lib/delay.c')
| -rw-r--r-- | arch/x86/lib/delay.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c index 553f8fd23cc4..4846eff7e4c8 100644 --- a/arch/x86/lib/delay.c +++ b/arch/x86/lib/delay.c @@ -107,10 +107,10 @@ static void delay_mwaitx(unsigned long __loops) delay = min_t(u64, MWAITX_MAX_LOOPS, loops); /* - * Use cpu_tss as a cacheline-aligned, seldomly + * Use cpu_tss_rw as a cacheline-aligned, seldomly * accessed per-cpu variable as the monitor target. */ - __monitorx(raw_cpu_ptr(&cpu_tss), 0, 0); + __monitorx(raw_cpu_ptr(&cpu_tss_rw), 0, 0); /* * AMD, like Intel, supports the EAX hint and EAX=0xf |