diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2016-07-07 15:41:13 +0200 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2016-07-07 15:41:13 +0200 |
commit | 3d93f42d449ace8e2dd8e2ec9790fdce31a14c9c (patch) | |
tree | 16abfc89c51a2cf0116eb692a591faf897e04297 /drivers/clocksource/timer-nps.c | |
parent | 4b4b20852d1009c5e8bc357b22353b62e3a241c7 (diff) | |
parent | 34c720a915857f168b98ab03f97b33784286e4ad (diff) | |
download | linux-3d93f42d449ace8e2dd8e2ec9790fdce31a14c9c.tar.gz linux-3d93f42d449ace8e2dd8e2ec9790fdce31a14c9c.tar.xz |
Merge branch 'clockevents/4.8' of http://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull the clockevents/clocksource tree from Daniel Lezcano:
- Convert the clocksource-probe init functions to return a value in order to
prepare the consolidation of the drivers using the DT. It is a big patchset
but went through 01.org (kbuild bot), linux next and kernel-ci (continuous
integration) (Daniel Lezcano)
- Fix a bad error handling by returning the right value for cadence_ttc
(Christophe Jaillet)
- Fix typo in the Kconfig for the Samsung pwm (Alexandre Belloni)
- Change functions to static for armada-370-xp and digicolor (Ben Dooks)
- Add support for the rk3399 SoC timer by adding bindings and a slight
change in the base address. Take the opportunity to add the DYNIRQ flag
(Huang Tao)
- Fix endian accessors for the Samsung pwm timer (Matthew Leach)
- Add Oxford Semiconductor RPS Dual Timer driver (Neil Armstrong)
- Add a kernel parameter to swich on/off the event stream feature of the arch
arm timer (Will Deacon)
Diffstat (limited to 'drivers/clocksource/timer-nps.c')
-rw-r--r-- | drivers/clocksource/timer-nps.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/clocksource/timer-nps.c b/drivers/clocksource/timer-nps.c index d46108920b2c..70c149af8ee0 100644 --- a/drivers/clocksource/timer-nps.c +++ b/drivers/clocksource/timer-nps.c @@ -55,8 +55,8 @@ static cycle_t nps_clksrc_read(struct clocksource *clksrc) return (cycle_t)ioread32be(nps_msu_reg_low_addr[cluster]); } -static void __init nps_setup_clocksource(struct device_node *node, - struct clk *clk) +static int __init nps_setup_clocksource(struct device_node *node, + struct clk *clk) { int ret, cluster; @@ -68,7 +68,7 @@ static void __init nps_setup_clocksource(struct device_node *node, ret = clk_prepare_enable(clk); if (ret) { pr_err("Couldn't enable parent clock\n"); - return; + return ret; } nps_timer_rate = clk_get_rate(clk); @@ -79,19 +79,21 @@ static void __init nps_setup_clocksource(struct device_node *node, pr_err("Couldn't register clock source.\n"); clk_disable_unprepare(clk); } + + return ret; } -static void __init nps_timer_init(struct device_node *node) +static int __init nps_timer_init(struct device_node *node) { struct clk *clk; clk = of_clk_get(node, 0); if (IS_ERR(clk)) { pr_err("Can't get timer clock.\n"); - return; + return PTR_ERR(clk); } - nps_setup_clocksource(node, clk); + return nps_setup_clocksource(node, clk); } CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer", |