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| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2016-09-22 14:06:49 +0300 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2016-11-02 10:48:18 +0200 |
| commit | 0a30e150f053e609f7820d81efebde28802035f3 (patch) | |
| tree | 1f108d6ea7fdf9b6019fd092a0799996dd87b8a1 /drivers/gpu/drm/omapdrm/dss/dispc.c | |
| parent | 4dc2250d7d9e816b986d656cde90f55c096012ed (diff) | |
| download | linux-0a30e150f053e609f7820d81efebde28802035f3.tar.gz linux-0a30e150f053e609f7820d81efebde28802035f3.tar.xz | |
drm/omap: omap_display_timings: rename hfp to hfront_porch
In preparation to move the stack to use the generic videmode struct for
display timing information rename the hfp member to hfront_porch.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm/dss/dispc.c')
| -rw-r--r-- | drivers/gpu/drm/omapdrm/dss/dispc.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 8f97a11a2e97..3f5c57fbfa94 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -2189,14 +2189,16 @@ static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk, u64 val, blank; int i; - nonactive = t->hactive + t->hfp + t->hsync_len + t->hbp - out_width; + nonactive = t->hactive + t->hfront_porch + t->hsync_len + + t->hbp - out_width; i = 0; if (out_height < height) i++; if (out_width < width) i++; - blank = div_u64((u64)(t->hbp + t->hsync_len + t->hfp) * lclk, pclk); + blank = div_u64((u64)(t->hbp + t->hsync_len + t->hfront_porch) * + lclk, pclk); DSSDBG("blanking period + ppl = %llu (limit = %u)\n", blank, limits[i]); if (blank <= limits[i]) return -EINVAL; @@ -3129,9 +3131,9 @@ bool dispc_mgr_timings_ok(enum omap_channel channel, if (timings->interlace) return false; - if (!_dispc_lcd_timings_ok(timings->hsync_len, timings->hfp, - timings->hbp, timings->vsw, timings->vfp, - timings->vbp)) + if (!_dispc_lcd_timings_ok(timings->hsync_len, + timings->hfront_porch, timings->hbp, + timings->vsw, timings->vfp, timings->vbp)) return false; } @@ -3267,12 +3269,12 @@ void dispc_mgr_set_timings(enum omap_channel channel, } if (dss_mgr_is_lcd(channel)) { - _dispc_mgr_set_lcd_timings(channel, t.hsync_len, t.hfp, t.hbp, - t.vsw, t.vfp, t.vbp, t.vsync_level, + _dispc_mgr_set_lcd_timings(channel, t.hsync_len, t.hfront_porch, + t.hbp, t.vsw, t.vfp, t.vbp, t.vsync_level, t.hsync_level, t.data_pclk_edge, t.de_level, t.sync_pclk_edge); - xtot = t.hactive + t.hfp + t.hsync_len + t.hbp; + xtot = t.hactive + t.hfront_porch + t.hsync_len + t.hbp; ytot = t.vactive + t.vfp + t.vsw + t.vbp; ht = timings->pixelclock / xtot; @@ -3280,7 +3282,7 @@ void dispc_mgr_set_timings(enum omap_channel channel, DSSDBG("pck %u\n", timings->pixelclock); DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n", - t.hsync_len, t.hfp, t.hbp, t.vsw, t.vfp, t.vbp); + t.hsync_len, t.hfront_porch, t.hbp, t.vsw, t.vfp, t.vbp); DSSDBG("vsync_level %d hsync_level %d data_pclk_edge %d de_level %d sync_pclk_edge %d\n", t.vsync_level, t.hsync_level, t.data_pclk_edge, t.de_level, t.sync_pclk_edge); @@ -4223,7 +4225,7 @@ static const struct dispc_errata_i734_data { .timings = { .hactive = 8, .vactive = 1, .pixelclock = 16000000, - .hsync_len = 8, .hfp = 4, .hbp = 4, + .hsync_len = 8, .hfront_porch = 4, .hbp = 4, .vsw = 1, .vfp = 1, .vbp = 1, .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, |