diff options
| author | Lendacky, Thomas <Thomas.Lendacky@amd.com> | 2016-11-03 13:18:56 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-11-04 14:48:44 -0400 |
| commit | b03a4a6fb309a000a0fba5f2af06ffc5767b0e45 (patch) | |
| tree | dfc3099ddace8e6bcd7c01ac98b0f5acab507fb8 /drivers/net/ethernet/amd/xgbe/xgbe-common.h | |
| parent | 1bf40ada62901e14395902d0934a4e51e04afe46 (diff) | |
| download | linux-b03a4a6fb309a000a0fba5f2af06ffc5767b0e45.tar.gz linux-b03a4a6fb309a000a0fba5f2af06ffc5767b0e45.tar.xz | |
amd-xgbe: Prepare for a new PCS register access method
Prepare the code to be able to support accessing of the PCS registers
in a new way, while maintaining the current access method. Provide a
version specific field that indicates the method to use.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/amd/xgbe/xgbe-common.h')
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-common.h | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h index 8bcf4ef050d6..6c40915d065b 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h +++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h @@ -852,14 +852,9 @@ #define MTL_TSA_SP 0x00 #define MTL_TSA_ETS 0x02 -/* PCS MMD select register offset - * The MMD select register is used for accessing PCS registers - * when the underlying APB3 interface is using indirect addressing. - * Indirect addressing requires accessing registers in two phases, - * an address phase and a data phase. The address phases requires - * writing an address selection value to the MMD select regiesters. - */ -#define PCS_MMD_SELECT 0xff +/* PCS register offsets */ +#define PCS_V1_WINDOW_SELECT 0x03fc +#define PCS_V2_WINDOW_SELECT 0x9064 /* SerDes integration register offsets */ #define SIR0_KR_RT_1 0x002c @@ -1241,12 +1236,18 @@ do { \ /* Macros for building, reading or writing register values or bits * within the register values of XPCS registers. */ -#define XPCS_IOWRITE(_pdata, _off, _val) \ +#define XPCS32_IOWRITE(_pdata, _off, _val) \ iowrite32(_val, (_pdata)->xpcs_regs + (_off)) -#define XPCS_IOREAD(_pdata, _off) \ +#define XPCS32_IOREAD(_pdata, _off) \ ioread32((_pdata)->xpcs_regs + (_off)) +#define XPCS16_IOWRITE(_pdata, _off, _val) \ + iowrite16(_val, (_pdata)->xpcs_regs + (_off)) + +#define XPCS16_IOREAD(_pdata, _off) \ + ioread16((_pdata)->xpcs_regs + (_off)) + /* Macros for building, reading or writing register values or bits * within the register values of SerDes integration registers. */ |