diff options
Diffstat (limited to 'arch/arm/boot/dts/at91sam9g45.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9g45.dtsi | 92 |
1 files changed, 69 insertions, 23 deletions
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index c340f6635d81..dc9a4ee28bc8 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -132,59 +132,75 @@ }; }; - uart0 { - pinctrl_uart0: uart0-0 { + usart0 { + pinctrl_usart0: usart0-0 { atmel,pins = <1 19 0x1 0x1 /* PB19 periph A with pullup */ 1 18 0x1 0x0>; /* PB18 periph A */ }; - pinctrl_uart0_rts_cts: uart0_rts_cts-0 { + pinctrl_usart0_rts: usart0_rts-0 { atmel,pins = - <1 17 0x2 0x0 /* PB17 periph B */ - 1 15 0x2 0x0>; /* PB15 periph B */ + <1 17 0x2 0x0>; /* PB17 periph B */ + }; + + pinctrl_usart0_cts: usart0_cts-0 { + atmel,pins = + <1 15 0x2 0x0>; /* PB15 periph B */ }; }; uart1 { - pinctrl_uart1: uart1-0 { + pinctrl_usart1: usart1-0 { atmel,pins = <1 4 0x1 0x1 /* PB4 periph A with pullup */ 1 5 0x1 0x0>; /* PB5 periph A */ }; - pinctrl_uart1_rts_cts: uart1_rts_cts-0 { + pinctrl_usart1_rts: usart1_rts-0 { + atmel,pins = + <3 16 0x1 0x0>; /* PD16 periph A */ + }; + + pinctrl_usart1_cts: usart1_cts-0 { atmel,pins = - <3 16 0x1 0x0 /* PD16 periph A */ - 3 17 0x1 0x0>; /* PD17 periph A */ + <3 17 0x1 0x0>; /* PD17 periph A */ }; }; - uart2 { - pinctrl_uart2: uart2-0 { + usart2 { + pinctrl_usart2: usart2-0 { atmel,pins = <1 6 0x1 0x1 /* PB6 periph A with pullup */ 1 7 0x1 0x0>; /* PB7 periph A */ }; - pinctrl_uart2_rts_cts: uart2_rts_cts-0 { + pinctrl_usart2_rts: usart2_rts-0 { atmel,pins = - <2 9 0x2 0x0 /* PC9 periph B */ - 2 11 0x2 0x0>; /* PC11 periph B */ + <2 9 0x2 0x0>; /* PC9 periph B */ + }; + + pinctrl_usart2_cts: usart2_cts-0 { + atmel,pins = + <2 11 0x2 0x0>; /* PC11 periph B */ }; }; - uart3 { - pinctrl_uart3: uart3-0 { + usart3 { + pinctrl_usart3: usart3-0 { atmel,pins = <1 8 0x1 0x1 /* PB9 periph A with pullup */ 1 9 0x1 0x0>; /* PB8 periph A */ }; - pinctrl_uart3_rts_cts: uart3_rts_cts-0 { + pinctrl_usart3_rts: usart3_rts-0 { + atmel,pins = + <0 23 0x2 0x0>; /* PA23 periph B */ + }; + + pinctrl_usart3_cts: usart3_cts-0 { atmel,pins = - <0 23 0x2 0x0 /* PA23 periph B */ - 0 24 0x2 0x0>; /* PA24 periph B */ + <0 24 0x2 0x0>; /* PA24 periph B */ }; }; @@ -196,6 +212,34 @@ }; }; + macb { + pinctrl_macb_rmii: macb_rmii-0 { + atmel,pins = + <0 10 0x1 0x0 /* PA10 periph A */ + 0 11 0x1 0x0 /* PA11 periph A */ + 0 12 0x1 0x0 /* PA12 periph A */ + 0 13 0x1 0x0 /* PA13 periph A */ + 0 14 0x1 0x0 /* PA14 periph A */ + 0 15 0x1 0x0 /* PA15 periph A */ + 0 16 0x1 0x0 /* PA16 periph A */ + 0 17 0x1 0x0 /* PA17 periph A */ + 0 18 0x1 0x0 /* PA18 periph A */ + 0 19 0x1 0x0>; /* PA19 periph A */ + }; + + pinctrl_macb_rmii_mii: macb_rmii_mii-0 { + atmel,pins = + <0 6 0x2 0x0 /* PA6 periph B */ + 0 7 0x2 0x0 /* PA7 periph B */ + 0 8 0x2 0x0 /* PA8 periph B */ + 0 9 0x2 0x0 /* PA9 periph B */ + 0 27 0x2 0x0 /* PA27 periph B */ + 0 28 0x2 0x0 /* PA28 periph B */ + 0 29 0x2 0x0 /* PA29 periph B */ + 0 30 0x2 0x0>; /* PA30 periph B */ + }; + }; + pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; @@ -263,7 +307,7 @@ atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; + pinctrl-0 = <&pinctrl_usart0>; status = "disabled"; }; @@ -274,7 +318,7 @@ atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; + pinctrl-0 = <&pinctrl_usart1>; status = "disabled"; }; @@ -285,7 +329,7 @@ atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; + pinctrl-0 = <&pinctrl_usart2>; status = "disabled"; }; @@ -296,7 +340,7 @@ atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; + pinctrl-0 = <&pinctrl_usart3>; status = "disabled"; }; @@ -304,6 +348,8 @@ compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; interrupts = <25 4 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb_rmii>; status = "disabled"; }; |