| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | RISC-V: Limit the scope of TLB shootdowns | Andrew Waterman | 2018-01-30 |
| * | riscv: remove CONFIG_MMU ifdefs | Christoph Hellwig | 2018-01-07 |
| * | RISC-V: User-Visible Changes | Palmer Dabbelt | 2017-12-01 |
| |\ | |||
| | * | RISC-V: Flush I$ when making a dirty page executable | Andrew Waterman | 2017-11-30 |
| * | | RISC-V: `sfence.vma` orderes the instruction cache | Palmer Dabbelt | 2017-11-28 |
| |/ | |||
| * | RISC-V: Atomic and Locking Code | Palmer Dabbelt | 2017-09-26 |
 |
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