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path: root/drivers/gpu/drm/i915/intel_ddi.c
Commit message (Expand)AuthorAge
* Backmerge tag 'v4.16-rc7' into drm-nextDave Airlie2018-03-28
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| * drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.Dhinakaran Pandiyan2018-03-19
* | drm/i915/icl: do not save DDI A/E sharing bit for ICLJani Nikula2018-03-16
* | drm/i915: Track whether the DP link is trained or notVille Syrjälä2018-03-06
* | drm/i915: Move SST DP link retraining into the ->post_hotplug() hookVille Syrjälä2018-03-06
* | drm/i915: Reinitialize sink scrambling/TMDS clock ratio on HPDVille Syrjälä2018-03-06
* | drm/i915/icl: remove port A/E lane sharing limitation.Mahesh Kumar2018-03-05
* | Merge tag 'drm-intel-next-2018-02-21' of git://anongit.freedesktop.org/drm/dr...Dave Airlie2018-03-01
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| * | drm/i915: Use INTEL_GEN everywhereTvrtko Ursulin2018-02-09
* | | Merge tag 'topic/hdcp-2018-02-13' of git://anongit.freedesktop.org/drm/drm-mi...Dave Airlie2018-02-16
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| * | drm/i915: Implement HDCP for HDMISean Paul2018-01-08
| * | drm/i915: Add HDCP framework + base implementationSean Paul2018-01-08
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* | drm/i915/cnl: Enable DDI-F on Cannonlake.Rodrigo Vivi2018-01-30
* | drm/i915: Implement display w/a #1143Ville Syrjälä2018-01-24
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* drm/i915: Fix indentation for intel_ddi_clk_selectChris Wilson2017-12-19
* drm/i915: Protect DDI port to DPLL map from theoretical race.Rodrigo Vivi2017-12-18
* drm/i915/cnl: Mask previous DDI - PLL mappingJames Ausmus2017-12-01
* drm/i915: Fix has_audio readout for DDI AVille Syrjälä2017-12-01
* drm/i915: Generalize transcoder loopingMika Kahola2017-11-14
* drm/i915: Nuke intel_digital_port->portVille Syrjälä2017-11-09
* drm/i915: Pass around crtc and connector states for audioVille Syrjälä2017-10-31
* drm/i915: Use intel_ddi_get_config() for MSTVille Syrjälä2017-10-30
* drm/i915: Pass a crtc state to ddi post_disable from MST codeVille Syrjälä2017-10-30
* drm/i915: Eliminate pll->state usage from bxt_calc_pll_link()Ville Syrjälä2017-10-30
* drm/i915: Nuke intel_ddi_get_encoder_port()Ville Syrjälä2017-10-30
* drm/i915: Stop frobbing with DDI encoder->typeVille Syrjälä2017-10-30
* drm/i915: Populate output_types from .get_config()Ville Syrjälä2017-10-30
* drm/i915: Fix BXT lane latency optimal setting with MSTVille Syrjälä2017-10-27
* drm/i915: Stop using encoder->type in intel_ddi_enable_transcoder_func()Ville Syrjälä2017-10-27
* drm/i915: Pass crtc state to intel_prepare_dp_ddi_buffers()Ville Syrjälä2017-10-27
* drm/i915: Don't use encoder->type in intel_ddi_set_pipe_settings()Ville Syrjälä2017-10-27
* drm/i915: Adjust system agent voltage on CNL if required by DDI portsVille Syrjälä2017-10-25
* drm/i915/cnl: Force DDI_A_4_LANES when needed.Rodrigo Vivi2017-10-24
* drm/i915: Let's use more enum intel_dpll_id pll_id.Rodrigo Vivi2017-10-20
* drm/i915: Drop the redundant hdmi prefix/suffix from a lot of variablesVille Syrjälä2017-10-19
* drm/i915: Unify error handling for missing DDI buf trans tablesVille Syrjälä2017-10-19
* drm/i915: Centralize the SKL DDI A/E vs. B/C/D buf trans handlingVille Syrjälä2017-10-19
* drm/i915: Kill off the BXT buf_trans default_indexVille Syrjälä2017-10-19
* drm/i915: Pass encoder type to cnl_ddi_vswing_sequence() explicitlyVille Syrjälä2017-10-19
* drm/i915: Integrate BXT into intel_ddi_dp_voltage_max()Ville Syrjälä2017-10-19
* drm/i915: Pass the level to intel_prepare_hdmi_ddi_buffers()Ville Syrjälä2017-10-19
* drm/i915: Pass the encoder type explicitly to skl_set_iboost()Ville Syrjälä2017-10-19
* drm/i915: Extract intel_ddi_get_buf_trans_hdmi()Ville Syrjälä2017-10-19
* drm/i915: Relocate intel_ddi_get_buf_trans_*() functionsVille Syrjälä2017-10-19
* drm/i915/cnl: Fix PLL mapping.Rodrigo Vivi2017-10-16
* drm/i915: Use bdw_ddi_translations_fdi for BroadwellChris Wilson2017-10-13
* drm/i915: Split intel_enable_ddi() into DP and HDMI variantsVille Syrjälä2017-10-13
* drm/i915: Plumb crtc_state etc. directly to intel_ddi_pre_enable_{dp,hdmi}()Ville Syrjälä2017-10-13
* drm/i915: Split intel_disable_ddi() into DP vs. HDMI variantsVille Syrjälä2017-10-13
* drm/i915: Remove useless eDP check from intel_ddi_pre_enable_dp()Ville Syrjälä2017-10-13
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