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path: root/drivers/gpu/drm/i915/intel_dpio_phy.c
Commit message (Expand)AuthorAge
* drm/i915/bxt: Don't set OCL2_LDOFUSE_PWR_DIS bit in phy init sequenceAnder Conselvan de Oliveira2016-11-02
* drm/i915: Address broxton phy registers based on phy and channel numberAnder Conselvan de Oliveira2016-10-28
* drm/i915: Add location of the Rcomp resistor to bxt_ddi_phy_infoAnder Conselvan de Oliveira2016-10-28
* drm/i915: Create a struct to hold information about the broxton physAnder Conselvan de Oliveira2016-10-28
* drm/i915: Move broxton vswing sequence to intel_dpio_phy.cAnder Conselvan de Oliveira2016-10-28
* drm/i915: Move DPIO phy documentation section to intel_dpio_phy.cAnder Conselvan de Oliveira2016-10-28
* drm/i915: Move broxton phy code to intel_dpio_phy.cAnder Conselvan de Oliveira2016-10-28
* drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson2016-07-04
* drm/i915: Move VLV HDMI lane reset work around logic to intel_dpio_phy.cAnder Conselvan de Oliveira2016-04-29
* drm/i915: Unduplicate pre encoder enabling phy codeAnder Conselvan de Oliveira2016-04-29
* drm/i915: Unduplicate VLV phy pre pll enabling codeAnder Conselvan de Oliveira2016-04-29
* drm/i915: Unduplicate VLV signal level codeAnder Conselvan de Oliveira2016-04-29
* drm/i915: Unduplicate CHV encoders' post pll disable codeAnder Conselvan de Oliveira2016-04-29
* drm/i915: Unduplicate CHV pre-encoder enabling phy logicAnder Conselvan de Oliveira2016-04-29
* drm/i915: Unduplicate CHV phy-releated pre pll enabling codeAnder Conselvan de Oliveira2016-04-29
* drm/i915: Unduplicate chv_data_lane_soft_reset()Ander Conselvan de Oliveira2016-04-29
* drm/i915: Unduplicate CHV signal level codeAnder Conselvan de Oliveira2016-04-29
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