| Commit message (Expand) | Author | Age |
|---|
| * | KVM: arm/arm64: PMU: Fix overflow interrupt injection | Andrew Jones | 2017-07-25 |
| * | KVM: arm64: Allow creating the PMU without the in-kernel GIC | Christoffer Dall | 2017-06-08 |
| * | KVM: arm/arm64: Report PMU overflow interrupts to userspace irqchip | Christoffer Dall | 2017-04-09 |
| * | arm64: KVM: fix build with CONFIG_ARM_PMU disabled | Sudeep Holla | 2016-06-27 |
| * | arm64: KVM: Add a new vcpu device control group for PMUv3 | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Add a new feature bit for PMUv3 | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Free perf event of PMU when destroying vcpu | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Reset PMU state when resetting vcpu | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Add PMU overflow interrupt routing | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Add helper to handle PMCR register bits | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Add access handler for PMSWINC register | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Add access handler for PMOVSSET and PMOVSCLR register | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: PMU: Add perf event map and introduce perf event creating function | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Add access handler for PMCNTENSET and PMCNTENCLR register | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Add access handler for event counter register | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Add access handler for PMCR register | Shannon Zhao | 2016-02-29 |
| * | arm64: KVM: Define PMU data structure for each vcpu | Shannon Zhao | 2016-02-29 |
